The invention relates to an integrated circuit arrangement, which contains an electrically insulating region and at least one capacitor. The capacitor is formed from a sequence of regions which contains in the order specified:
an electrode region near the insulating region,
a dielectric region, and
an electrode region remote from the insulating region.
The electrically insulating region comprises, for example, an electrically insulating material having a resistivity of greater than 1012 Ωcm (ohm centimeters) at 20° C. room temperature, e.g. an oxide, in particular silicon dioxide. The electrode region contains, by way of example, a metal having an electrical resistivity of less than 10−4 Ωcm at 20° C. room temperature. As an alternative, the electrode regions contain polycrystalline silicon, for example, which is highly doped. The dielectric region likewise comprises an electrically insulating material, e.g. an oxide, in particular silicon dioxide, which has a dielectric constant of about 3.9. However, dielectric materials having a significantly larger dielectric constant are also used in the dielectric region.